TY - JOUR
T1 - Via minimization with associated constraints in three-layer routing problem
AU - Fang, Sung Chuan
AU - Chang, Kuo En
AU - Feng, Wu Shiung
PY - 1990
Y1 - 1990
N2 - Via minimization is the same as the layer assignment problem in VLSI or PCB routing. It consists of determining which layers can be used for routing the wire segments such that the number of vias can be minimized. A heuristic algorithm is presented to globally eliminate the vias in the three-layer channel routing. Some associated constraints, such as restricted terminals and adjacent limitation, are addressed extensively. According to the results, the algorithm is fast and efficient, thus generating very good results.
AB - Via minimization is the same as the layer assignment problem in VLSI or PCB routing. It consists of determining which layers can be used for routing the wire segments such that the number of vias can be minimized. A heuristic algorithm is presented to globally eliminate the vias in the three-layer channel routing. Some associated constraints, such as restricted terminals and adjacent limitation, are addressed extensively. According to the results, the algorithm is fast and efficient, thus generating very good results.
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M3 - Conference article
AN - SCOPUS:0025692528
SN - 0271-4310
VL - 2
SP - 1632
EP - 1635
JO - Proceedings - IEEE International Symposium on Circuits and Systems
JF - Proceedings - IEEE International Symposium on Circuits and Systems
T2 - 1990 IEEE International Symposium on Circuits and Systems Part 3 (of 4)
Y2 - 1 May 1990 through 3 May 1990
ER -