Vertical SCR structure for on-chip ESD protection in nanoscale CMOS technology

Chun-Yu Lin, Pin Hsin Chang, Rong Kun Chang, Ming Dou Ker, Wen Tai Wang

研究成果: 書貢獻/報告類型會議論文篇章

2 引文 斯高帕斯(Scopus)

摘要

A vertical silicon-controlled rectifier (SCR) structure utilizing ESD implantation layer was proposed and implemented in nanoscale CMOS technology. Compared with the traditional SCR structure, the proposed structure has lower trigger voltage and high enough ESD protection capability. Therefore, the proposed structure was suitable for ESD protection in nanoscale CMOS process.

原文英語
主出版物標題Proceedings of the 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015
發行者Institute of Electrical and Electronics Engineers Inc.
頁面255-258
頁數4
ISBN(電子)9781479999286, 9781479999286
DOIs
出版狀態已發佈 - 2015 八月 25
事件22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015 - Hsinchu, 臺灣
持續時間: 2015 六月 292015 七月 2

出版系列

名字Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA
2015-August

其他

其他22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015
國家/地區臺灣
城市Hsinchu
期間2015/06/292015/07/02

ASJC Scopus subject areas

  • 電氣與電子工程

指紋

深入研究「Vertical SCR structure for on-chip ESD protection in nanoscale CMOS technology」主題。共同形成了獨特的指紋。

引用此