Vertical organic transistors withstanding high voltage bias

Po Yi Chang; Shao Fu Peng; Yu Chiang Chao; Hung Cheng Lin; Hsiao Wen Zan; Hsin Fei Meng

doi:10.1063/1.4917562

Vertical organic transistors withstanding high voltage bias

Po Yi Chang, Shao Fu Peng, Yu Chiang Chao^*, Hung Cheng Lin, Hsiao Wen Zan, Hsin Fei Meng

^*此作品的通信作者

研究成果: 雜誌貢獻 › 期刊論文 › 同行評審

2 引文斯高帕斯（Scopus）

摘要

Vertical organic transistors withstanding high voltage bias were realized with an insulating silicon monoxide layer obliquely deposited on both the surface of the base electrode and sidewalls of the vertically oriented cylindrical nanopores. No noticeable insulating layer can be observed on the emitter electrode at the bottom of the cylindrical nanopores. The leakage current between the electrodes was suppressed and an operating voltage as high as 15 V was obtained. An on/off current ratio of 10³-10⁴ and an output current density of 5-10 mA/cm² were achieved.

原文	英語
文章編號	153301
期刊	Applied Physics Letters
卷	106
發行號	15
DOIs	https://doi.org/10.1063/1.4917562
出版狀態	已發佈 - 2015 四月 13
對外發佈	是

ASJC Scopus subject areas

物理與天文學（雜項）

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10.1063/1.4917562

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title = "Vertical organic transistors withstanding high voltage bias",

abstract = "Vertical organic transistors withstanding high voltage bias were realized with an insulating silicon monoxide layer obliquely deposited on both the surface of the base electrode and sidewalls of the vertically oriented cylindrical nanopores. No noticeable insulating layer can be observed on the emitter electrode at the bottom of the cylindrical nanopores. The leakage current between the electrodes was suppressed and an operating voltage as high as 15 V was obtained. An on/off current ratio of 103-104 and an output current density of 5-10 mA/cm2 were achieved.",

author = "Chang, {Po Yi} and Peng, {Shao Fu} and Chao, {Yu Chiang} and Lin, {Hung Cheng} and Zan, {Hsiao Wen} and Meng, {Hsin Fei}",

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AU - Chang, Po Yi

AU - Peng, Shao Fu

AU - Chao, Yu Chiang

AU - Lin, Hung Cheng

AU - Zan, Hsiao Wen

AU - Meng, Hsin Fei

PY - 2015/4/13

Y1 - 2015/4/13

N2 - Vertical organic transistors withstanding high voltage bias were realized with an insulating silicon monoxide layer obliquely deposited on both the surface of the base electrode and sidewalls of the vertically oriented cylindrical nanopores. No noticeable insulating layer can be observed on the emitter electrode at the bottom of the cylindrical nanopores. The leakage current between the electrodes was suppressed and an operating voltage as high as 15 V was obtained. An on/off current ratio of 103-104 and an output current density of 5-10 mA/cm2 were achieved.

AB - Vertical organic transistors withstanding high voltage bias were realized with an insulating silicon monoxide layer obliquely deposited on both the surface of the base electrode and sidewalls of the vertically oriented cylindrical nanopores. No noticeable insulating layer can be observed on the emitter electrode at the bottom of the cylindrical nanopores. The leakage current between the electrodes was suppressed and an operating voltage as high as 15 V was obtained. An on/off current ratio of 103-104 and an output current density of 5-10 mA/cm2 were achieved.

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Vertical organic transistors withstanding high voltage bias

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