Thin Relaxed SiGe Layers for Strained Si CMOS

P. S. Chen*, S. W. Lee, M. H. Lee, C. W. Liu, M. J. Tsai

*此作品的通信作者

研究成果: 書貢獻/報告類型會議論文篇章

摘要

High quality, low cost and smooth surface of thin relaxed SiGe layers on new buffers are fabricated This SiGe nanostructure buffers help thin SiGe uniform layers to relax by introducing some dislocations networks. With these novel Si/Ge buffer, the reduction of thickness of relaxed SiGe uniform layer are from 50 to 75% . The mobility enhancement of the strained Si n-MOSFET deposited on theses relaxed SiGe layer/SiGe buffers are 8 to 40% higher than that of controlled compositional graded SiGe buffers. Such thin relaxed SiGe layerson these new buffers proves to be useful approach to fabricate high quality relaxed epilayers with large lattice mismatch.

原文英語
主出版物標題2004 Semiconductor Manufacturing Technology Workshop Proceedings, SMTW
頁面79-82
頁數4
出版狀態已發佈 - 2004
對外發佈
事件2004 Semiconductor Manufacturing Technology Workshop Proceedings, SMTW - , 臺灣
持續時間: 2004 九月 92004 九月 10

出版系列

名字2004 Semiconductor Manufacturing Technology Workshop Proceedings, SMTW

其他

其他2004 Semiconductor Manufacturing Technology Workshop Proceedings, SMTW
國家/地區臺灣
期間2004/09/092004/09/10

ASJC Scopus subject areas

  • 工程 (全部)

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