A comprehensive analysis on the BTI induced RTN traps in high-k(HK) CMOS devices have been investigated in inversion (inv.) and accumulation (acc.) modes. The combination of two modes for RTN measurement provides a wide range of energy window in high-k gate dielectric, in which a simple extraction method of RTN analysis has been adopted to analyze the gate dielectric dual-layer of advanced HK devices. The results show that inversion mode measurement can only identify the RTN traps in the channel region, which is related to the V
degradation. While, accumulation mode may detect the traps inside the gate-drain overlap region which provides better understanding of GIDL current. This basic understanding is of critical important to the quality development of HK gate dielectrics in advanced CMOS technologies.