The demonstration of carbon nanotubes (CNTs) as flip-chip connections in 3-D integrated circuits with an ultralow connection resistance

M. H. Liao, P. Y. Lu, W. J. Su, S. C. Chen, H. T. Hung, C. R. Kao, W. C. Pu, C. C.A. Chen, M. H. Lee

研究成果: 雜誌貢獻文章

摘要

In this brief, the high-quality carbon nanotubes (CNTs) is grown by a chemical vapor deposition (CVD) method, and it is used as an ultrafine flip-chip interconnection material in the proposed 3-D integrated circuit (3DIC) system. We show a patterned growth of multiwalled CNTs on the substrate with prestructured bond pads including a complete metallization system for an electrical characterization. We succeeded in achieving reliable flip-chip connections between CNT-covered contact pads and metal pads during the room temperature bonding process. The goal is a reversible electrical and mechanical chip assembly with CNT bumps. Based on the current-voltage (I - V) measurements, the resistivity (ρ) of the grown CNTs is found to be close to ∼ 10-6 Ωm. With the proposed 3DIC process flow, the vertically electrical connection between two different Si substrates is demonstrated successfully. The connection resistance in the full 3-D system is very promising (∼ 2.43 Ω), compared with other's work (∼ 12 Ω). The different bonding materials (In versus Sn) and bonding times are also investigated systemically and further optimized. This brief provides a useful solution for the future electrical connection in the high-performance and high-dense 3-D integrated devices.

原文英語
文章編號9042868
頁(從 - 到)2205-2207
頁數3
期刊IEEE Transactions on Electron Devices
67
發行號5
DOIs
出版狀態已發佈 - 2020 五月

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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