Substrate current verifying lateral electrical field under forward substrate biases for nMOSFETs

Heng Sheng Huang, Mu Chun Wang*, Zhen Ying Hsieh, Shuang Yuan Chen, Ai Erh Chuang, Chuan Hsi Liu

*此作品的通信作者

研究成果: 雜誌貢獻期刊論文同行評審

2 引文 斯高帕斯(Scopus)

摘要

Substrate current ISUB of an n-channel metal-oxide-semiconductor field-effect transistor (nMOSFET) depending on source/drain voltage VDS can be applied as a stress index in the hot carrier test. Usually, the substrate bias directly influences device performance, such as the threshold voltage and the source/drain current. On the other hand, the substrate biasing circuit benefits turn-on current and restrains the turn-off current. However, few studies assessed the change to substrate current when forcing different drain voltages and substrate biases. Furthermore, a unique phenomenon was observed: separation of ISUB curves and consentient trends existed while gate voltage VGS increased from 0 to 1.8 V and a turning point located around at the peak value of ISUB. Here, this study identifies the increase in surface inversion charge Qi from substrate effect in weak inversion layer more than in strong one is evidently correlated with this interesting symptom. In this study, the gate length LG and the gate width W of a measured nMOSFET device is 0.18 μm and 10 μm with a 90 nm process.

原文英語
頁(從 - 到)527-529
頁數3
期刊Solid-State Electronics
54
發行號5
DOIs
出版狀態已發佈 - 2010 5月

ASJC Scopus subject areas

  • 電子、光磁材料
  • 凝聚態物理學
  • 電氣與電子工程
  • 材料化學

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