Sub-60mV-swing negative-capacitance FinFET without hysteresis

Kai Shin Li; Pin Guang Chen; Tung Yan Lai; Chang Hsien Lin; Cheng Chih Cheng; Chun Chi Chen; Yun Jie Wei; Yun Fang Hou; Ming Han Liao; Min Hung Lee; Min Cheng Chen; Jia Min Sheih; Wen Kuan Yeh; Fu Liang Yang; Sayeef Salahuddin; Chenming Hu

doi:10.1109/IEDM.2015.7409760

Sub-60mV-swing negative-capacitance FinFET without hysteresis

Kai Shin Li, Pin Guang Chen, Tung Yan Lai, Chang Hsien Lin, Cheng Chih Cheng, Chun Chi Chen, Yun Jie Wei, Yun Fang Hou, Ming Han Liao, Min Hung Lee, Min Cheng Chen, Jia Min Sheih, Wen Kuan Yeh, Fu Liang Yang, Sayeef Salahuddin, Chenming Hu

光電工程學士學位學程

研究成果: 書貢獻/報告類型 › 會議論文篇章

242 引文斯高帕斯（Scopus）

摘要

In this work, we report the first Negative-Capacitance FinFET. ALD Hf₀₄₂Zr₀₅₈O₂ is added on top of the FinFET's gate stack. The test devices have a floating internal gate that can be electrically probed. Direct measurement found the small-signal voltage amplified by 1.6X maximum at the internal gate in agreement with the improvement of the subthreshold swing (from 87 to 55mV/decade). ION increased by >25% for the IOFF. For the first time, we demonstrate that raising HfZrO₂ ferroelectricity, by annealing at higher temperature, reduces and eliminates IV hysteresis and increases the voltage gain. These discoveries will guide future theoretical and experimental work.

原文	英語
主出版物標題	2015 IEEE International Electron Devices Meeting, IEDM 2015
發行者	Institute of Electrical and Electronics Engineers Inc.
頁面	22.6.1-22.6.4
ISBN（電子）	9781467398930
DOIs	https://doi.org/10.1109/IEDM.2015.7409760
出版狀態	已發佈 - 2015 2月 16
事件	61st IEEE International Electron Devices Meeting, IEDM 2015 - Washington, 美国持續時間: 2015 12月 7 → 2015 12月 9

出版系列

名字	Technical Digest - International Electron Devices Meeting, IEDM
卷	2016-February
ISSN（列印）	0163-1918

其他

其他	61st IEEE International Electron Devices Meeting, IEDM 2015
國家/地區	美国
城市	Washington
期間	2015/12/07 → 2015/12/09

ASJC Scopus subject areas

電子、光磁材料
凝聚態物理學
電氣與電子工程
材料化學

存取文件

10.1109/IEDM.2015.7409760

其它文件與鏈接

引用此

Li, K. S., Chen, P. G., Lai, T. Y., Lin, C. H., Cheng, C. C., Chen, C. C., Wei, Y. J., Hou, Y. F., Liao, M. H., Lee, M. H., Chen, M. C., Sheih, J. M., Yeh, W. K., Yang, F. L., Salahuddin, S., & Hu, C. (2015). Sub-60mV-swing negative-capacitance FinFET without hysteresis. 於 2015 IEEE International Electron Devices Meeting, IEDM 2015 (頁 22.6.1-22.6.4). 文章 7409760 (Technical Digest - International Electron Devices Meeting, IEDM; 卷 2016-February). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IEDM.2015.7409760

Sub-60mV-swing negative-capacitance FinFET without hysteresis. / Li, Kai Shin; Chen, Pin Guang; Lai, Tung Yan 等.
2015 IEEE International Electron Devices Meeting, IEDM 2015. Institute of Electrical and Electronics Engineers Inc., 2015. p. 22.6.1-22.6.4 7409760 (Technical Digest - International Electron Devices Meeting, IEDM; 卷 2016-February).

研究成果: 書貢獻/報告類型 › 會議論文篇章

Li, KS, Chen, PG, Lai, TY, Lin, CH, Cheng, CC, Chen, CC, Wei, YJ, Hou, YF, Liao, MH, Lee, MH, Chen, MC, Sheih, JM, Yeh, WK, Yang, FL, Salahuddin, S & Hu, C 2015, Sub-60mV-swing negative-capacitance FinFET without hysteresis. 於 2015 IEEE International Electron Devices Meeting, IEDM 2015., 7409760, Technical Digest - International Electron Devices Meeting, IEDM, 卷 2016-February, Institute of Electrical and Electronics Engineers Inc., 頁 22.6.1-22.6.4, 61st IEEE International Electron Devices Meeting, IEDM 2015, Washington, 美国, 2015/12/07. https://doi.org/10.1109/IEDM.2015.7409760

@inproceedings{008a7f09716043fb8b915bcbc8a2bf06,

title = "Sub-60mV-swing negative-capacitance FinFET without hysteresis",

abstract = "In this work, we report the first Negative-Capacitance FinFET. ALD Hf042Zr058O2 is added on top of the FinFET's gate stack. The test devices have a floating internal gate that can be electrically probed. Direct measurement found the small-signal voltage amplified by 1.6X maximum at the internal gate in agreement with the improvement of the subthreshold swing (from 87 to 55mV/decade). ION increased by >25% for the IOFF. For the first time, we demonstrate that raising HfZrO2 ferroelectricity, by annealing at higher temperature, reduces and eliminates IV hysteresis and increases the voltage gain. These discoveries will guide future theoretical and experimental work.",

author = "Li, {Kai Shin} and Chen, {Pin Guang} and Lai, {Tung Yan} and Lin, {Chang Hsien} and Cheng, {Cheng Chih} and Chen, {Chun Chi} and Wei, {Yun Jie} and Hou, {Yun Fang} and Liao, {Ming Han} and Lee, {Min Hung} and Chen, {Min Cheng} and Sheih, {Jia Min} and Yeh, {Wen Kuan} and Yang, {Fu Liang} and Sayeef Salahuddin and Chenming Hu",

note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; 61st IEEE International Electron Devices Meeting, IEDM 2015 ; Conference date: 07-12-2015 Through 09-12-2015",

year = "2015",

month = feb,

day = "16",

doi = "10.1109/IEDM.2015.7409760",

language = "English",

series = "Technical Digest - International Electron Devices Meeting, IEDM",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "22.6.1--22.6.4",

booktitle = "2015 IEEE International Electron Devices Meeting, IEDM 2015",

}

TY - GEN

T1 - Sub-60mV-swing negative-capacitance FinFET without hysteresis

AU - Li, Kai Shin

AU - Chen, Pin Guang

AU - Lai, Tung Yan

AU - Lin, Chang Hsien

AU - Cheng, Cheng Chih

AU - Chen, Chun Chi

AU - Wei, Yun Jie

AU - Hou, Yun Fang

AU - Liao, Ming Han

AU - Lee, Min Hung

AU - Chen, Min Cheng

AU - Sheih, Jia Min

AU - Yeh, Wen Kuan

AU - Yang, Fu Liang

AU - Salahuddin, Sayeef

AU - Hu, Chenming

PY - 2015/2/16

Y1 - 2015/2/16

N2 - In this work, we report the first Negative-Capacitance FinFET. ALD Hf042Zr058O2 is added on top of the FinFET's gate stack. The test devices have a floating internal gate that can be electrically probed. Direct measurement found the small-signal voltage amplified by 1.6X maximum at the internal gate in agreement with the improvement of the subthreshold swing (from 87 to 55mV/decade). ION increased by >25% for the IOFF. For the first time, we demonstrate that raising HfZrO2 ferroelectricity, by annealing at higher temperature, reduces and eliminates IV hysteresis and increases the voltage gain. These discoveries will guide future theoretical and experimental work.

AB - In this work, we report the first Negative-Capacitance FinFET. ALD Hf042Zr058O2 is added on top of the FinFET's gate stack. The test devices have a floating internal gate that can be electrically probed. Direct measurement found the small-signal voltage amplified by 1.6X maximum at the internal gate in agreement with the improvement of the subthreshold swing (from 87 to 55mV/decade). ION increased by >25% for the IOFF. For the first time, we demonstrate that raising HfZrO2 ferroelectricity, by annealing at higher temperature, reduces and eliminates IV hysteresis and increases the voltage gain. These discoveries will guide future theoretical and experimental work.

UR - http://www.scopus.com/inward/record.url?scp=84964049619&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84964049619&partnerID=8YFLogxK

U2 - 10.1109/IEDM.2015.7409760

DO - 10.1109/IEDM.2015.7409760

M3 - Conference contribution

AN - SCOPUS:84964049619

T3 - Technical Digest - International Electron Devices Meeting, IEDM

SP - 22.6.1-22.6.4

BT - 2015 IEEE International Electron Devices Meeting, IEDM 2015

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 61st IEEE International Electron Devices Meeting, IEDM 2015

Y2 - 7 December 2015 through 9 December 2015

ER -

Sub-60mV-swing negative-capacitance FinFET without hysteresis

摘要

出版系列

其他

ASJC Scopus subject areas

存取文件

其它文件與鏈接

指紋

引用此