Simulation-based study of negative-capacitance double-gate tunnel field-effect transistor with ferroelectric gate stack

Chien Liu, Ping Guang Chen, Meng Jie Xie, Shao Nong Liu, Jun Wei Lee, Shao Jia Huang, Sally Liu, Yu Sheng Chen, Heng Yuan Lee, Ming Han Liao, Pang Shiu Chen, Min Hung Lee

研究成果: 雜誌貢獻期刊論文同行評審

14 引文 斯高帕斯(Scopus)

摘要

The concept of ferroelectric (FE) negative capacitance (NC) may be a turning point in overcoming the physical limitations imposed by the Boltzmann tyranny to realize next-generation state-of-the-art devices. Both the body factor (m-factor) and the transport mechanism (n-factor) are simultaneously improved by integrating an NC with a tunnel FET (TFET). The modeling approach is discussed in this study as well as the NC physics. By optimizing the thicknesses of FE, semiconductor, and interfacial layers, the capacitance of the FE layers is modulated to match that of a MOS resulting in the smallest subthreshold swing that is also hysteresis-free. An ultrathin-body double gate tunnel FET (UTB-DG-TFET) exhibits a steep slope (a subthreshold swing below 10mV/dec over more than 4 orders of magnitude) for low-power applications (<0.2V switching voltage) to realize next-generation state-of-the-art devices.

原文英語
文章編號04EB08
期刊Japanese Journal of Applied Physics
55
發行號4
DOIs
出版狀態已發佈 - 2016 四月

ASJC Scopus subject areas

  • 工程 (全部)
  • 物理與天文學 (全部)

指紋

深入研究「Simulation-based study of negative-capacitance double-gate tunnel field-effect transistor with ferroelectric gate stack」主題。共同形成了獨特的指紋。

引用此