Resistor-triggered SCR device for ESD protection in high-speed I/O interface circuits

Chun-Yu Lin*, Chun Yu Chen, M. Tabib-Azar

*此作品的通信作者

研究成果: 雜誌貢獻期刊論文同行評審

10 引文 斯高帕斯(Scopus)

摘要

In this letter, an on-chip electrostatic discharge (ESD) protection device was proposed for highspeed I/O interface circuits. A resistor-triggered siliconcontrolled rectifier device with improved performance was designed and investigated in a nanoscale CMOS process. As verified in a 0.18-μm CMOS process, the proposed design exhibits a lower clamping voltage and low enough overshoot voltage during ESD stress conditions, and lower parasitic capacitance and low enough leakage current during normal circuit operating conditions. Therefore, the proposed design is suitable for ESD protection of high-speed circuits in low-voltage CMOS processes.

原文英語
文章編號7907283
頁(從 - 到)712-715
頁數4
期刊IEEE Electron Device Letters
38
發行號6
DOIs
出版狀態已發佈 - 2017 六月

ASJC Scopus subject areas

  • 電子、光磁材料
  • 電氣與電子工程

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