Physically based modeling for stress assessment in MOS devices

Chang Chun Lee, Kuei Chih Lin, Yi Hsien Lin, Yu Cheng Lai, Chuan-Hsi Liu

研究成果: 書貢獻/報告類型會議貢獻

摘要

For the purpose of boosting the performance of MOS devices, applying mechanical stresses to change the semiconductor's band structure as well as to modulate the conduction mass is an effective and promising approach besides continuing to shrink the critical dimension of the devices. As a result of the stress impact on channel depends upon the layout-induced changes in topography of devices, it is therefore necessary to understand the physical behavior of strained silicon when the stressors such as silicon germanium (SiGe), silicon carbon (SiC) alloys and contact-etch-stop layer (CESL) are introduced. Accordingly, this paper presents a three-dimensional (3D) finite element analysis (FEA) combined with piezo-resistance mobility model to assess device performance in 40nm, 32nm technology node, and beyond. The presented simulation methodology is verified to be excellently reliable as is calibrated directly from electrical data. Based on the confirmed results of mobility gain, several important parameters, such as the recess depth of shallow trench isolation (STI) and channel width, are systematically investigated. It is noted that the stronger vertical stress (Szz) resulting from CESL is the main consequence of the reduction in channel width. Furthermore, the analytical results indicate that the extent of the mechanical effect of bending moment from a tensile CESL would be introduced into a fixed 100 nm narrow channel width of NMOSFETs when the concerned protruding gate width continues to increase.

原文英語
主出版物標題2014 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2014
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781479923342
DOIs
出版狀態已發佈 - 2014 三月 13
事件2014 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2014 - Chengdu, 中国
持續時間: 2014 六月 182014 六月 20

其他

其他2014 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2014
國家中国
城市Chengdu
期間14/6/1814/6/20

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Hardware and Architecture

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  • 引用此

    Lee, C. C., Lin, K. C., Lin, Y. H., Lai, Y. C., & Liu, C-H. (2014). Physically based modeling for stress assessment in MOS devices. 於 2014 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2014 [7061231] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/EDSSC.2014.7061231