Package-strain-enhanced device and circuit performance

S. Maikap*, M. H. Liao, F. Yuan, M. H. Lee, C. F. Huang, S. T. Chang, C. W. Liu

*此作品的通信作者

研究成果: 雜誌貢獻會議論文同行評審

21 引文 斯高帕斯(Scopus)

摘要

The hole mobility enhancement can be as high as -18% for SiO2 and ∼20% for high-κ HfO2 gate stack dielectrics with the uniaxial compressive strain (0.2%) parallel to the channel. The highest drain current of -22% at saturation and ∼30% at linear region is observed for the bulk Si PMOS with high-K gate stacks. The drain current and hole mobility of bulk Si PMOS are degraded under the small biaxial tensile strain, while substrate-strained Si device shows opposite. The nonoptimized ring oscillator has the speed enhancement of ∼7% under the uniaxial tensile strain parallel to NMOS channel. Proper package strain also gives the drive-current as well as mobility enhancement at 100°C.

原文英語
頁(從 - 到)233-236
頁數4
期刊Technical Digest - International Electron Devices Meeting, IEDM
DOIs
出版狀態已發佈 - 2004
對外發佈
事件IEEE International Electron Devices Meeting, 2004 IEDM - San Francisco, CA, 美国
持續時間: 2004 12月 132004 12月 15

ASJC Scopus subject areas

  • 電子、光磁材料
  • 凝聚態物理學
  • 電氣與電子工程
  • 材料化學

指紋

深入研究「Package-strain-enhanced device and circuit performance」主題。共同形成了獨特的指紋。

引用此