One-Transistor ferroelectric versatile memory: Strained-gate engineering for realizing energy-efficient switching and fast negative-capacitance operation

Yu Chien Chiu, Chun Hu Cheng, Chun Yen Chang, Ying Tsan Tang, Min Cheng Chen

研究成果: 書貢獻/報告類型會議論文篇章

17 引文 斯高帕斯(Scopus)

摘要

In this work, we report a ferroelectric versatile memory (FE-VM) with strained-gate engineering. The memory window of high strain case was improved by ∼47% at the same ferroelectric thickness, which agrees with the increase of orthorhombic crystallinity. Based on a reliable first principle calculation (FPC), we clarify that the gate strain accelerates the phase transformation from metastable monoclinic to orthorhombic and thus largely enhances the ferroelectric polarization without increasing dielectric thickness. On the other hand, the orthorhombic FE-AFE phase transition plays a key role in realizing negative capacitance (NC) effect at high gate electric field. This 1T strained-gate FE-VM with ferroelectric NC achieves a sub-60-mVdec subthreshold swing (SS) over ∼4 decade of ID to provide a 1∼10 fA/μm Ioff and >108 Ion/Ioff ratio, which allows for a fast 20-ns P/E switching during 1012 cycling endurance.

原文英語
主出版物標題2016 IEEE Symposium on VLSI Technology, VLSI Technology 2016
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781509006373
DOIs
出版狀態已發佈 - 2016 九月 21
對外發佈
事件36th IEEE Symposium on VLSI Technology, VLSI Technology 2016 - Honolulu, 美国
持續時間: 2016 六月 132016 六月 16

出版系列

名字Digest of Technical Papers - Symposium on VLSI Technology
2016-September
ISSN(列印)0743-1562

其他

其他36th IEEE Symposium on VLSI Technology, VLSI Technology 2016
國家/地區美国
城市Honolulu
期間2016/06/132016/06/16

ASJC Scopus subject areas

  • 電氣與電子工程

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