Network intrusion detection based on shift-OR circuit

Huang Chun Roan, Wen Jyi Hwang, Wei Jhih Huang, Chia Tien Dan Lo

研究成果: 雜誌貢獻文章

摘要

This paper introduces a novel FPGA-based signature match co-processor that can serve as the core of a hardware-based network intrusion detection system (NIDS). The key feature of the signature match co-processor is an architecture based on the shift-or algorithm, which employs simple shift registers, or-gates, and ROMs where patterns are stored. As compared with related work, experimental results show that the proposed work achieves higher throughput and less hardware resource in the FPGA implementations of NIDS systems.

原文英語
頁(從 - 到)1229-1239
頁數11
期刊Journal of Information Science and Engineering
24
發行號4
出版狀態已發佈 - 2008 七月 1

    指紋

ASJC Scopus subject areas

  • Software
  • Human-Computer Interaction
  • Hardware and Architecture
  • Library and Information Sciences
  • Computational Theory and Mathematics

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