Multi-Layer Chips on Wafer Stacking Technologies with Carbon Nano-Tubes as Through-Silicon Vias and it's potential applications for Power-Via technologies

Bo Zhou Liao; Liang Hsi Chen; Kai Cheng Chen; Hong Yi Lin; Yi Ting Tsai; Ting Wei Chen; Yi Cheng Chan; Min Hung Lee; Ming Han Liao

doi:10.1109/ECTC51906.2022.00285

Multi-Layer Chips on Wafer Stacking Technologies with Carbon Nano-Tubes as Through-Silicon Vias and it's potential applications for Power-Via technologies

Bo Zhou Liao, Liang Hsi Chen, Kai Cheng Chen, Hong Yi Lin, Yi Ting Tsai, Ting Wei Chen, Yi Cheng Chan, Min Hung Lee, Ming Han Liao^*

^*此作品的通信作者

光電工程學士學位學程

研究成果: 書貢獻/報告類型 › 會議論文篇章

3 引文斯高帕斯（Scopus）

摘要

In this work, carbon nanotubes (CNTs) are grown as advanced filler materials in through-silicon via (TSV). Electrical and thermal properties of CNTs are extracted by experiments and the implementation of multi-layer stacking is proposed. The resistance and thermal conductivity of CNT are measured as 10.5 ohm and 49 W/mK respectively. In accordance with its superior properties over copper, Carbon nanotubes as TSVs (CNT-TSV) have several advantages in three-dimensional integrated circuit (3DIC) technology. Signal integrity index, namely return loss and insertion loss have been evaluated by ANSYS HFSS (High frequency Structure Simulator). Within the high frequency interval (10~20 GHz), CNT-TSV has better electrical characteristics than copper. In summary, CNTs can be a promising material used in future chip on wafer stacking process.

原文	英語
主出版物標題	Proceedings - IEEE 72nd Electronic Components and Technology Conference, ECTC 2022
發行者	Institute of Electrical and Electronics Engineers Inc.
頁面	1811-1817
頁數	7
ISBN（電子）	9781665479431
DOIs	https://doi.org/10.1109/ECTC51906.2022.00285
出版狀態	已發佈 - 2022
事件	72nd IEEE Electronic Components and Technology Conference, ECTC 2022 - San Diego, 美国持續時間: 2022 5月 31 → 2022 6月 3

出版系列

名字	Proceedings - Electronic Components and Technology Conference
卷	2022-May
ISSN（列印）	0569-5503

會議

會議	72nd IEEE Electronic Components and Technology Conference, ECTC 2022
國家/地區	美国
城市	San Diego
期間	2022/05/31 → 2022/06/03

ASJC Scopus subject areas

電子、光磁材料
電氣與電子工程

存取文件

10.1109/ECTC51906.2022.00285

其它文件與鏈接

Link to publication in Scopus

引用此

Liao, B. Z., Chen, L. H., Chen, K. C., Lin, H. Y., Tsai, Y. T., Chen, T. W., Chan, Y. C., Lee, M. H., & Liao, M. H. (2022). Multi-Layer Chips on Wafer Stacking Technologies with Carbon Nano-Tubes as Through-Silicon Vias and it's potential applications for Power-Via technologies. 於 Proceedings - IEEE 72nd Electronic Components and Technology Conference, ECTC 2022 (頁 1811-1817). (Proceedings - Electronic Components and Technology Conference; 卷 2022-May). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ECTC51906.2022.00285

Multi-Layer Chips on Wafer Stacking Technologies with Carbon Nano-Tubes as Through-Silicon Vias and it's potential applications for Power-Via technologies. / Liao, Bo Zhou; Chen, Liang Hsi; Chen, Kai Cheng 等.
Proceedings - IEEE 72nd Electronic Components and Technology Conference, ECTC 2022. Institute of Electrical and Electronics Engineers Inc., 2022. p. 1811-1817 (Proceedings - Electronic Components and Technology Conference; 卷 2022-May).

研究成果: 書貢獻/報告類型 › 會議論文篇章

Liao, BZ, Chen, LH, Chen, KC, Lin, HY, Tsai, YT, Chen, TW, Chan, YC, Lee, MH & Liao, MH 2022, Multi-Layer Chips on Wafer Stacking Technologies with Carbon Nano-Tubes as Through-Silicon Vias and it's potential applications for Power-Via technologies. 於 Proceedings - IEEE 72nd Electronic Components and Technology Conference, ECTC 2022. Proceedings - Electronic Components and Technology Conference, 卷 2022-May, Institute of Electrical and Electronics Engineers Inc., 頁 1811-1817, 72nd IEEE Electronic Components and Technology Conference, ECTC 2022, San Diego, 美国, 2022/05/31. https://doi.org/10.1109/ECTC51906.2022.00285

Liao BZ, Chen LH, Chen KC, Lin HY, Tsai YT, Chen TW 等. Multi-Layer Chips on Wafer Stacking Technologies with Carbon Nano-Tubes as Through-Silicon Vias and it's potential applications for Power-Via technologies. 於 Proceedings - IEEE 72nd Electronic Components and Technology Conference, ECTC 2022. Institute of Electrical and Electronics Engineers Inc. 2022. p. 1811-1817. (Proceedings - Electronic Components and Technology Conference). doi: 10.1109/ECTC51906.2022.00285

Liao, Bo Zhou ; Chen, Liang Hsi ; Chen, Kai Cheng 等. / Multi-Layer Chips on Wafer Stacking Technologies with Carbon Nano-Tubes as Through-Silicon Vias and it's potential applications for Power-Via technologies. Proceedings - IEEE 72nd Electronic Components and Technology Conference, ECTC 2022. Institute of Electrical and Electronics Engineers Inc., 2022. 頁 1811-1817 (Proceedings - Electronic Components and Technology Conference).

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title = "Multi-Layer Chips on Wafer Stacking Technologies with Carbon Nano-Tubes as Through-Silicon Vias and it's potential applications for Power-Via technologies",

abstract = "In this work, carbon nanotubes (CNTs) are grown as advanced filler materials in through-silicon via (TSV). Electrical and thermal properties of CNTs are extracted by experiments and the implementation of multi-layer stacking is proposed. The resistance and thermal conductivity of CNT are measured as 10.5 ohm and 49 W/mK respectively. In accordance with its superior properties over copper, Carbon nanotubes as TSVs (CNT-TSV) have several advantages in three-dimensional integrated circuit (3DIC) technology. Signal integrity index, namely return loss and insertion loss have been evaluated by ANSYS HFSS (High frequency Structure Simulator). Within the high frequency interval (10~20 GHz), CNT-TSV has better electrical characteristics than copper. In summary, CNTs can be a promising material used in future chip on wafer stacking process.",

keywords = "3DIC, CNT, TSV, signal integrity, thermal conductivity",

author = "Liao, {Bo Zhou} and Chen, {Liang Hsi} and Chen, {Kai Cheng} and Lin, {Hong Yi} and Tsai, {Yi Ting} and Chen, {Ting Wei} and Chan, {Yi Cheng} and Lee, {Min Hung} and Liao, {Ming Han}",

note = "Funding Information: V. ACKNOWLEDGMENT This work is supported by the Ministry of Science and Technology (MOST), Taiwan, under the grants 109-2628-E-002 -003-MY3 and 110-2218-E-002-042-MBK. This work is also supported by the Ministry of Education, Taiwan, under the grants 110L892605, 110L7728 and 110HT512004. The partial process support from Taiwan Semiconductor Research Institute (TSRI), Taiwan, is also highly appreciated. Publisher Copyright: {\textcopyright} 2022 IEEE.; 72nd IEEE Electronic Components and Technology Conference, ECTC 2022 ; Conference date: 31-05-2022 Through 03-06-2022",

year = "2022",

doi = "10.1109/ECTC51906.2022.00285",

language = "English",

series = "Proceedings - Electronic Components and Technology Conference",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "1811--1817",

booktitle = "Proceedings - IEEE 72nd Electronic Components and Technology Conference, ECTC 2022",

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T1 - Multi-Layer Chips on Wafer Stacking Technologies with Carbon Nano-Tubes as Through-Silicon Vias and it's potential applications for Power-Via technologies

AU - Liao, Bo Zhou

AU - Chen, Liang Hsi

AU - Chen, Kai Cheng

AU - Lin, Hong Yi

AU - Tsai, Yi Ting

AU - Chen, Ting Wei

AU - Chan, Yi Cheng

AU - Lee, Min Hung

AU - Liao, Ming Han

N1 - Funding Information: V. ACKNOWLEDGMENT This work is supported by the Ministry of Science and Technology (MOST), Taiwan, under the grants 109-2628-E-002 -003-MY3 and 110-2218-E-002-042-MBK. This work is also supported by the Ministry of Education, Taiwan, under the grants 110L892605, 110L7728 and 110HT512004. The partial process support from Taiwan Semiconductor Research Institute (TSRI), Taiwan, is also highly appreciated. Publisher Copyright: © 2022 IEEE.

PY - 2022

Y1 - 2022

N2 - In this work, carbon nanotubes (CNTs) are grown as advanced filler materials in through-silicon via (TSV). Electrical and thermal properties of CNTs are extracted by experiments and the implementation of multi-layer stacking is proposed. The resistance and thermal conductivity of CNT are measured as 10.5 ohm and 49 W/mK respectively. In accordance with its superior properties over copper, Carbon nanotubes as TSVs (CNT-TSV) have several advantages in three-dimensional integrated circuit (3DIC) technology. Signal integrity index, namely return loss and insertion loss have been evaluated by ANSYS HFSS (High frequency Structure Simulator). Within the high frequency interval (10~20 GHz), CNT-TSV has better electrical characteristics than copper. In summary, CNTs can be a promising material used in future chip on wafer stacking process.

AB - In this work, carbon nanotubes (CNTs) are grown as advanced filler materials in through-silicon via (TSV). Electrical and thermal properties of CNTs are extracted by experiments and the implementation of multi-layer stacking is proposed. The resistance and thermal conductivity of CNT are measured as 10.5 ohm and 49 W/mK respectively. In accordance with its superior properties over copper, Carbon nanotubes as TSVs (CNT-TSV) have several advantages in three-dimensional integrated circuit (3DIC) technology. Signal integrity index, namely return loss and insertion loss have been evaluated by ANSYS HFSS (High frequency Structure Simulator). Within the high frequency interval (10~20 GHz), CNT-TSV has better electrical characteristics than copper. In summary, CNTs can be a promising material used in future chip on wafer stacking process.

KW - 3DIC

KW - CNT

KW - TSV

KW - signal integrity

KW - thermal conductivity

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BT - Proceedings - IEEE 72nd Electronic Components and Technology Conference, ECTC 2022

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Multi-Layer Chips on Wafer Stacking Technologies with Carbon Nano-Tubes as Through-Silicon Vias and it's potential applications for Power-Via technologies

摘要

出版系列

會議

ASJC Scopus subject areas

存取文件

其它文件與鏈接

指紋

引用此