摘要
Power consumption is the most difficult challenge for CMOS integrated circuits. Here, we demonstrate experimentally a novel steep turn-on pMOSFET for low-voltage operation for the first time, which exhibits 5-60 mV/decade SS, wide voltage range for SS <60~ mV decade sturdy < 60~ mV decade SS at 85̂ C, faster transistor turn-on at above threshold voltage, and lower off-state leakage by greater than three orders of magnitude. Such improved leakage current is crucial to decrease the off-state leakage current in sub-1X nm CMOS. This was achieved using ferroelectric high-κ ZrHfO gate dielectric pMOSFET.
| 原文 | 英語 |
|---|---|
| 文章編號 | 6693802 |
| 頁(從 - 到) | 274-276 |
| 頁數 | 3 |
| 期刊 | IEEE Electron Device Letters |
| 卷 | 35 |
| 發行號 | 2 |
| DOIs | |
| 出版狀態 | 已發佈 - 2014 2月 |
ASJC Scopus subject areas
- 電子、光磁材料
- 電氣與電子工程
指紋
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