Low power resistive random access memory using interface-engineered dielectric stack of SiOx/a-Si/TiOy with 1D1R-like structure

Chun Hu Cheng; K. I. Chou; Zhi Wei Zheng; Hsiao Hsuan Hsu

doi:10.1016/j.cap.2013.10.019

Low power resistive random access memory using interface-engineered dielectric stack of SiO_x/a-Si/TiO_y with 1D1R-like structure

Chun Hu Cheng^*
, K. I. Chou
, Zhi Wei Zheng
, Hsiao Hsuan Hsu

^*此作品的通信作者

機電工程學系

研究成果: 雜誌貢獻 › 期刊論文 › 同行評審

12 引文斯高帕斯（Scopus）

摘要

In this study, we report a resistive random access memory (RRAM) using trilayer SiO_x/a-Si/TiO_y film structure. The low switching energy of <10 pJ, highly uniform current distribution (<13% variation), fast 50-ns speed and stable cycling endurance for 10⁶ cycles are simultaneously achieved in this RRAM device. Such good performance can be ascribed to the use of interface-engineered dielectric stack with 1D1R-like structure. The SiO_x tunnel barrier in contact with top Ni electrode to form diode-like rectifying element not only lowers self-compliance switching currents, but also improves cycling endurance, which is favorable for the application of high-density 3D memory.

原文	英語
頁（從 - 到）	139-143
頁數	5
期刊	Current Applied Physics
卷	14
發行號	1
DOIs	https://doi.org/10.1016/j.cap.2013.10.019
出版狀態	已發佈 - 2014

ASJC Scopus subject areas

一般材料科學
一般物理與天文學

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10.1016/j.cap.2013.10.019

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引用此

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title = "Low power resistive random access memory using interface-engineered dielectric stack of SiOx/a-Si/TiOy with 1D1R-like structure",

abstract = "In this study, we report a resistive random access memory (RRAM) using trilayer SiOx/a-Si/TiOy film structure. The low switching energy of <10 pJ, highly uniform current distribution (<13\% variation), fast 50-ns speed and stable cycling endurance for 106 cycles are simultaneously achieved in this RRAM device. Such good performance can be ascribed to the use of interface-engineered dielectric stack with 1D1R-like structure. The SiOx tunnel barrier in contact with top Ni electrode to form diode-like rectifying element not only lowers self-compliance switching currents, but also improves cycling endurance, which is favorable for the application of high-density 3D memory.",

keywords = "Current distribution, Resistive random access memory (RRAM), SiO, TiO",

author = "Cheng, \{Chun Hu\} and Chou, \{K. I.\} and Zheng, \{Zhi Wei\} and Hsu, \{Hsiao Hsuan\}",

note = "Funding Information: This work was supported by the National Science Council (NSC) of Taiwan, Republic of China, under contract no. NSC 102-2221-E-003-019 .",

year = "2014",

doi = "10.1016/j.cap.2013.10.019",

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pages = "139--143",

journal = "Current Applied Physics",

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T1 - Low power resistive random access memory using interface-engineered dielectric stack of SiOx/a-Si/TiOy with 1D1R-like structure

AU - Cheng, Chun Hu

AU - Chou, K. I.

AU - Zheng, Zhi Wei

AU - Hsu, Hsiao Hsuan

N1 - Funding Information: This work was supported by the National Science Council (NSC) of Taiwan, Republic of China, under contract no. NSC 102-2221-E-003-019 .

PY - 2014

Y1 - 2014

N2 - In this study, we report a resistive random access memory (RRAM) using trilayer SiOx/a-Si/TiOy film structure. The low switching energy of <10 pJ, highly uniform current distribution (<13% variation), fast 50-ns speed and stable cycling endurance for 106 cycles are simultaneously achieved in this RRAM device. Such good performance can be ascribed to the use of interface-engineered dielectric stack with 1D1R-like structure. The SiOx tunnel barrier in contact with top Ni electrode to form diode-like rectifying element not only lowers self-compliance switching currents, but also improves cycling endurance, which is favorable for the application of high-density 3D memory.

AB - In this study, we report a resistive random access memory (RRAM) using trilayer SiOx/a-Si/TiOy film structure. The low switching energy of <10 pJ, highly uniform current distribution (<13% variation), fast 50-ns speed and stable cycling endurance for 106 cycles are simultaneously achieved in this RRAM device. Such good performance can be ascribed to the use of interface-engineered dielectric stack with 1D1R-like structure. The SiOx tunnel barrier in contact with top Ni electrode to form diode-like rectifying element not only lowers self-compliance switching currents, but also improves cycling endurance, which is favorable for the application of high-density 3D memory.

KW - Current distribution

KW - Resistive random access memory (RRAM)

KW - SiO

KW - TiO

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U2 - 10.1016/j.cap.2013.10.019

DO - 10.1016/j.cap.2013.10.019

M3 - Article

AN - SCOPUS:84888097315

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JO - Current Applied Physics

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Low power resistive random access memory using interface-engineered dielectric stack of SiOx/a-Si/TiOy with 1D1R-like structure

摘要

ASJC Scopus subject areas

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引用此

Low power resistive random access memory using interface-engineered dielectric stack of SiO_x/a-Si/TiO_y with 1D1R-like structure