Low-Loss I/O Pad with ESD Protection for K/Ka-Bands Applications in the Nanoscale CMOS Process

Bo Wei Peng, Chun Yu Lin*

*此作品的通信作者

研究成果: 雜誌貢獻期刊論文同行評審

3 引文 斯高帕斯(Scopus)

摘要

The electrostatic discharge (ESD) protection devices are generally designed and employed near the input/output (I/O) pad to avoid the impact of ESD events. The diodes operated under forward-biased condition are widely used as ESD protection devices in integrated circuits. However, the parasitic effects of the ESD protection diodes with large dimension will seriously affect the performance of high-frequency circuits. In order to reduce the signal loss, the parasitic capacitance of ESD protection diodes must be minimized. Therefore, this brief proposed two low-loss I/O pads combined with stacked inductor and ESD protection diodes for K/Ka-bands applications. The traditional and proposed designs of I/O pads with ESD protection have been compared in silicon chip. The measurement results have demonstrated that the proposed structures with sufficient ESD-protection ability can achieve lower signal loss than the traditional design within K/Ka bands.

原文英語
文章編號8412600
頁(從 - 到)1475-1479
頁數5
期刊IEEE Transactions on Circuits and Systems II: Express Briefs
65
發行號10
DOIs
出版狀態已發佈 - 2018 十月

ASJC Scopus subject areas

  • 電氣與電子工程

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