Low-leakage-current DRAM-like memory using a one-transistor ferroelectric MOSFET with a Hf-based gate dielectric

Chun Hu Cheng, Albert Chin

研究成果: 雜誌貢獻期刊論文同行評審

79 引文 斯高帕斯(Scopus)

摘要

The power consumption of capacitor leakage current, increase of the capacitor aspect ratio, and lack of higher dielectric constant (κ) material are the difficult challenges to downscaling dynamic random access memory (DRAM). This letter reports a new one-transistor ferroelectric-MOSFET (1T FeMOS) device that displays DRAM functions of a 5 ns switching time, 10 12 on/off endurance cycles, and 30 times on/off retention windows at 5 s and 85°C. A simple 1T process and a considerably low OFF-state leakage of 3× 10-12A/μ m were achieved. This novel device was achieved by applying ferroelectric ZrHfO gate dielectric to a p-MOSFET, which is fully compatible with existing high-κ CMOS processing.

原文英語
文章編號6680625
頁(從 - 到)138-140
頁數3
期刊IEEE Electron Device Letters
35
發行號1
DOIs
出版狀態已發佈 - 2014 一月 1

ASJC Scopus subject areas

  • 電子、光磁材料
  • 電氣與電子工程

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