Low-Leakage and Low-Trigger-Voltage SCR Device for ESD Protection in 28-nm High-k Metal Gate CMOS Process

Chun Yu Lin, Yi Han Wu, Ming Dou Ker

研究成果: 雜誌貢獻期刊論文同行評審

15 引文 斯高帕斯(Scopus)

摘要

To effectively protect integrated circuits from electrostatic discharge (ESD) damage, this letter proposes a silicon-controlled rectifier (SCR) device with low trigger voltage, low leakage current, low parasitic capacitance, and which requires no additional process step. The proposed device uses two metal gates to separate the anode and cathode of the SCR to reduce the leakage current. These two gates are well controlled to trigger the SCR device. The test devices have been implemented and verified in a 28-nm high-k metal gate CMOS process. Experimental results show that the proposed SCR exhibits a low trigger voltage (<;3 V), low leakage current (<;5 nA), low parasitic capacitance (<; 40 fF), and sufficient ESD robustness (> 1 kV in human-body-model tests). Based on its good performances during ESD stress and normal circuit operating conditions, the proposed SCR device is very suitable for ESD protection in advanced CMOS processes.

原文英語
頁(從 - 到)1387-1390
頁數4
期刊IEEE Electron Device Letters
37
發行號11
DOIs
出版狀態已發佈 - 2016 十一月

ASJC Scopus subject areas

  • 電子、光磁材料
  • 電氣與電子工程

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