Investigation on CDM ESD events at core circuits in a 65-nm CMOS process

Chun Yu Lin*, Tang Long Chang, Ming Dou Ker

*此作品的通信作者

研究成果: 雜誌貢獻期刊論文同行評審

2 引文 斯高帕斯(Scopus)

摘要

Among three chip-level electrostatic discharge (ESD) test standards, which were human-body model (HBM), machine model (MM), and charged-device model (CDM), the CDM ESD events became critical due to the larger and faster discharging currents. Besides input/output (I/O) circuits which were connected to I/O pads, core circuits also suffered from CDM ESD events caused by coupled currents between I/O lines and core lines. In this work, the CDM ESD robustness of the core circuits with and without inserting shielding lines were investigated in a 65-nm CMOS process. Verified in a silicon chip, the CDM ESD robustness of the core circuits with shielding lines were degraded. The failure mechanism of the test circuits was also investigated in this work.

原文英語
頁(從 - 到)2627-2631
頁數5
期刊Microelectronics Reliability
52
發行號11
DOIs
出版狀態已發佈 - 2012 十一月

ASJC Scopus subject areas

  • 電子、光磁材料
  • 原子與分子物理與光學
  • 安全、風險、可靠性和品質
  • 凝聚態物理學
  • 表面、塗料和薄膜
  • 電氣與電子工程

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