Investigation of electrical characteristics on 25-nm InGaAs channel FinFET Using InAlAs back barrier and Al2O3 gate dielectric

M. H. Lin, Y. C. Lin, Y. S. Lin, W. J. Sun, S. H. Chen, Y. C. Chiu, C. H. Cheng, C. Y. Chang

研究成果: 雜誌貢獻文章

1 引文 (Scopus)

摘要

We investigated an N-type III–V FinFET with a 25-nm In0.53Ga0.47As channel and a 300-nm In0.52Al0.48As barrier layer on an InP substrate. The In0.52Al0.48As barrier layer is used to suppress leakage current from the InP substrate and the 10-nm Al2O3 film deposited by atomic layer deposition (ALD) can be a robust gate dielectric to mitigate interface traps. The on to off current ratio is approximately three orders of magnitude, the subthreshold swing (SS) is 350 mV/dec, and the maximum driving current density is 130 μA/μm at VG = 1.5 V for InGaAs FinFET with a fin width of 40 nm and gate length of 200 nm.

原文英語
頁(從 - 到)Q58-Q62
期刊ECS Journal of Solid State Science and Technology
6
發行號4
DOIs
出版狀態已發佈 - 2017 一月 1

指紋

Gate dielectrics
Atomic layer deposition
Substrates
Leakage currents
Current density
FinFET

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials

引用此文

Investigation of electrical characteristics on 25-nm InGaAs channel FinFET Using InAlAs back barrier and Al2O3 gate dielectric. / Lin, M. H.; Lin, Y. C.; Lin, Y. S.; Sun, W. J.; Chen, S. H.; Chiu, Y. C.; Cheng, C. H.; Chang, C. Y.

於: ECS Journal of Solid State Science and Technology, 卷 6, 編號 4, 01.01.2017, p. Q58-Q62.

研究成果: 雜誌貢獻文章

Lin, M. H. ; Lin, Y. C. ; Lin, Y. S. ; Sun, W. J. ; Chen, S. H. ; Chiu, Y. C. ; Cheng, C. H. ; Chang, C. Y. / Investigation of electrical characteristics on 25-nm InGaAs channel FinFET Using InAlAs back barrier and Al2O3 gate dielectric. 於: ECS Journal of Solid State Science and Technology. 2017 ; 卷 6, 編號 4. 頁 Q58-Q62.
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abstract = "We investigated an N-type III–V FinFET with a 25-nm In0.53Ga0.47As channel and a 300-nm In0.52Al0.48As barrier layer on an InP substrate. The In0.52Al0.48As barrier layer is used to suppress leakage current from the InP substrate and the 10-nm Al2O3 film deposited by atomic layer deposition (ALD) can be a robust gate dielectric to mitigate interface traps. The on to off current ratio is approximately three orders of magnitude, the subthreshold swing (SS) is 350 mV/dec, and the maximum driving current density is 130 μA/μm at VG = 1.5 V for InGaAs FinFET with a fin width of 40 nm and gate length of 200 nm.",
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T1 - Investigation of electrical characteristics on 25-nm InGaAs channel FinFET Using InAlAs back barrier and Al2O3 gate dielectric

AU - Lin, M. H.

AU - Lin, Y. C.

AU - Lin, Y. S.

AU - Sun, W. J.

AU - Chen, S. H.

AU - Chiu, Y. C.

AU - Cheng, C. H.

AU - Chang, C. Y.

PY - 2017/1/1

Y1 - 2017/1/1

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AB - We investigated an N-type III–V FinFET with a 25-nm In0.53Ga0.47As channel and a 300-nm In0.52Al0.48As barrier layer on an InP substrate. The In0.52Al0.48As barrier layer is used to suppress leakage current from the InP substrate and the 10-nm Al2O3 film deposited by atomic layer deposition (ALD) can be a robust gate dielectric to mitigate interface traps. The on to off current ratio is approximately three orders of magnitude, the subthreshold swing (SS) is 350 mV/dec, and the maximum driving current density is 130 μA/μm at VG = 1.5 V for InGaAs FinFET with a fin width of 40 nm and gate length of 200 nm.

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