Improving ESD Robustness of pMOS Device With Embedded SCR in 28-nm High-k/Metal Gate CMOS Process

Chun-Yu Lin, Pin Hsin Chang, Rong Kun Chang

研究成果: 雜誌貢獻文章

8 引文 (Scopus)

摘要

A pMOS device with an embedded silicon-controlled rectifier to improve its electrostatic discharge (ESD) robustness has been proposed and implemented in a 28-nm high-k/metal gate CMOS process. An additional p-type ESD implantation layer was added into the pMOS to realize the proposed device. The experimental results show that the proposed device has the advantages of high ESD robustness, low holding voltage, low parasitic capacitance, and good latchup immunity. With better performances, the proposed device was more suitable for ESD protection in a sub-50-nm CMOS process.

原文英語
文章編號7038138
頁(從 - 到)1349-1352
頁數4
期刊IEEE Transactions on Electron Devices
62
發行號4
DOIs
出版狀態已發佈 - 2015 四月 1

指紋

Electrostatic discharge
Thyristors
Metals
Capacitance
Electric potential

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

引用此文

Improving ESD Robustness of pMOS Device With Embedded SCR in 28-nm High-k/Metal Gate CMOS Process. / Lin, Chun-Yu; Chang, Pin Hsin; Chang, Rong Kun.

於: IEEE Transactions on Electron Devices, 卷 62, 編號 4, 7038138, 01.04.2015, p. 1349-1352.

研究成果: 雜誌貢獻文章

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