@inproceedings{8d9779d28078412f9a74b09bb415a4cd,
title = "Improved electrical characteristics and reliability of multi-stacking PNPN junctionless transistors using channel depletion effect",
abstract = "This work demonstrates a novel multi-stacking PNPN channel structure for nanowire junctionless transistor. With the multi-PNPN channel structure, the design of multi-stacking PNPN junctions can promote the p-type channel layer to achieve fully depleted channel, accompanied with the excellent electrical performances on a steep subthreshold swing of 77 mV/dec and a high on/off current ratio of >107. Besides, utilizing with the constant-voltage-stress measurement, the multi-PNPN channel junctionless FETs with a robust stress reliability was demonstrated.",
author = "Lin, \{Ming Huei\} and Shih, \{Yi Jia\} and Chien Liu and Chiu, \{Yu Chien\} and Fan, \{Chia Chi\} and Liou, \{Guan Lin\} and Cheng, \{Chun Hu\} and Chang, \{Chun Yen\}",
note = "Publisher Copyright: {\textcopyright} 2017 JSAP.; 22nd Silicon Nanoelectronics Workshop, SNW 2017 ; Conference date: 04-06-2017 Through 05-06-2017",
year = "2017",
month = dec,
day = "29",
doi = "10.23919/SNW.2017.8242290",
language = "English",
series = "2017 Silicon Nanoelectronics Workshop, SNW 2017",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "47--48",
booktitle = "2017 Silicon Nanoelectronics Workshop, SNW 2017",
}