Impact of shielding line on CDM ESD robustness of core circuits in a 65-nm CMOS process

Ming Dou Ker, Chun-Yu Lin, Chang Tang-Long Chang

研究成果: 書貢獻/報告類型會議貢獻

1 引文 斯高帕斯(Scopus)

摘要

The charged-device-model (CDM) ESD robustness of core circuit with/without the shielding line was studied in a 65-nm CMOS process. Verified in silicon chip, the CDM ESD robustness of core circuit with the shielding line was degraded. The damage mechanism and failure location of the test circuits were investigated in this work.

原文英語
主出版物標題2011 International Reliability Physics Symposium, IRPS 2011
DOIs
出版狀態已發佈 - 2011 六月 23
事件49th International Reliability Physics Symposium, IRPS 2011 - Monterey, CA, 美国
持續時間: 2011 四月 102011 四月 14

出版系列

名字IEEE International Reliability Physics Symposium Proceedings
ISSN(列印)1541-7026

其他

其他49th International Reliability Physics Symposium, IRPS 2011
國家美国
城市Monterey, CA
期間11/4/1011/4/14

    指紋

ASJC Scopus subject areas

  • Engineering(all)

引用此

Ker, M. D., Lin, C-Y., & Tang-Long Chang, C. (2011). Impact of shielding line on CDM ESD robustness of core circuits in a 65-nm CMOS process. 於 2011 International Reliability Physics Symposium, IRPS 2011 [5784565] (IEEE International Reliability Physics Symposium Proceedings). https://doi.org/10.1109/IRPS.2011.5784565