TY - GEN
T1 - High-voltage driving circuit with on-chip ESD protection in CMOS technology
AU - Lin, Chun Yu
AU - Chiu, Yan Lian
N1 - Funding Information:
This work was supported by Amazing Microelectronic Corp., Taiwan, and by Ministry of Science and Technology, Taiwan, under Contracts MOST 106-2622-E-003-001-CC2 and MOST 106-2221-E-003-033. The authors would like to thank National Chip Implementation Center (CIC), Taiwan, for the support of chip fabrication.
Funding Information:
ACKNOWLEDGMENT This work was supported by Amazing Microelectronic Corp., Taiwan, and by Ministry of Science and Technology, Taiwan, under Contracts MOST 106-2622-E-003-001-CC2 and MOST 106-2221-E-003-033. The authors would like to thank National Chip Implementation Center (CIC), Taiwan, for the support of chip fabrication.
Publisher Copyright:
© 2017 IEEE.
PY - 2018/2/2
Y1 - 2018/2/2
N2 - A high-voltage/high-power driving circuit for the applicatrions such as a motor controller in robot is presented in this work. The driving circuit is further equipped with a novel electrostatic discharge (ESD) protection design to enhance its reliability. A 3×VDD-tolerant driving circuit with on-chip ESD protection is demonstrated using a 0.18 μm CMOS process with Vdd of 3.3V. The ESD robustness can be improved without the use of any additional ESD protection device or layout area. Furthermore, this design technique can be used for an nVdd-tolerant driving circuit with improved ESD robustness.
AB - A high-voltage/high-power driving circuit for the applicatrions such as a motor controller in robot is presented in this work. The driving circuit is further equipped with a novel electrostatic discharge (ESD) protection design to enhance its reliability. A 3×VDD-tolerant driving circuit with on-chip ESD protection is demonstrated using a 0.18 μm CMOS process with Vdd of 3.3V. The ESD robustness can be improved without the use of any additional ESD protection device or layout area. Furthermore, this design technique can be used for an nVdd-tolerant driving circuit with improved ESD robustness.
KW - CMOS
KW - driving circuit
KW - electrostatic discharge (ESD)
KW - reliability
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U2 - 10.1109/ICIIBMS.2017.8279758
DO - 10.1109/ICIIBMS.2017.8279758
M3 - Conference contribution
AN - SCOPUS:85047546760
T3 - ICIIBMS 2017 - 2nd International Conference on Intelligent Informatics and Biomedical Sciences
SP - 223
EP - 224
BT - ICIIBMS 2017 - 2nd International Conference on Intelligent Informatics and Biomedical Sciences
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2nd International Conference on Intelligent Informatics and Biomedical Sciences, ICIIBMS 2017
Y2 - 24 November 2017 through 26 November 2017
ER -