High speed k-winner-take-all competitive learning in reconfigurable hardware

Hui Ya Li*, Yao Jung Yeh, Wen Jyi Hwang, Cheng Tsun Yang

*此作品的通信作者

研究成果: 書貢獻/報告類型會議論文篇章

4 引文 斯高帕斯(Scopus)

摘要

A novel hardware architecture of the competitive learning (CL) algorithm with k-winners-take-all activation is presented in this paper. It is used as a custom logic block in the arithmetic logic unit (ALU) of the softcore NIOS processor for CL training. Both the partial distance search (PDS) module and hardware divider adopt finite precision calculation for area cost reduction at the expense of slight degradation in training performance. The PDS module also employs subspace search and multiple-coefficient accumulation techniques for effective reduction of the computation latency for the PDS search. Experiment results show that the CPU time is lower than that of Pentium IV processors running the CL training program without the support of custom hardware.

原文英語
主出版物標題Next-Generation Applied Intelligence - 22nd International Conference on Industrial, Engineering and Other Applications of Applied Intelligent Systems, IEA/AIE 2009, Proceedings
頁面594-603
頁數10
DOIs
出版狀態已發佈 - 2009
事件22nd International Conference on Industrial, Engineering and Other Applications of Applied Intelligent Systems, IEA/AIE 2009 - Tainan, 臺灣
持續時間: 2009 6月 242009 6月 27

出版系列

名字Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
5579 LNAI
ISSN(列印)0302-9743
ISSN(電子)1611-3349

其他

其他22nd International Conference on Industrial, Engineering and Other Applications of Applied Intelligent Systems, IEA/AIE 2009
國家/地區臺灣
城市Tainan
期間2009/06/242009/06/27

ASJC Scopus subject areas

  • 理論電腦科學
  • 一般電腦科學

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