In this article we demonstrate high performance giant magneto resistive spin transistor (GMRST) and magneto tunneling resistive spin transistor (MTRST) which base on the technologies of giant magneto resistance (GMR) and tunneling magneto resistance (TMR) effects. A p-n junction whose leakage is less than a Schottky diode is used as a potential barrier to select spin electrons. In case of GMRST the collector current, IC, varies from 95 μA at magnetically parallel state to 2.6 μA at magnetically anti-parallel state and gives a percentage change of more than 3400% at 77K. For the same magnetic states at room temperature the change reduces to about 53.4% with IC vans from 213 μA to 138.8 μA As for the MTRST, the change of I C is about 45% at room temperature with current varies from 29 μA to 42 μA. The transfer ratio of these twp spin devices increases as emitter bias is increased, however, higher emitter current does not benefit the change of magneto current. Memory effect which is the intrinsic behavior of magnetic phenomena is also demonstrated.
|出版狀態||已發佈 - 2004|
|事件||2004 7th International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT 2004 - Beijing, 中国|
持續時間: 2004 10月 18 → 2004 10月 21
|其他||2004 7th International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT 2004|
|期間||2004/10/18 → 2004/10/21|
ASJC Scopus subject areas
- 工程 (全部)