High-κ gate dielectrics for Ge CMOS and related memory devices

Albert Chin, P. C. Chen, C. H. Cheng, Y. H. Wu, X. Y. Liu, J. F. Kang

研究成果: 書貢獻/報告類型會議論文篇章

摘要

To reach future low power operation at ≤0.5 V, high mobility InGaAs nMOS and Ge pMOS were proposed at sub-14 nm nodes. However, the integration of InGaAs on Si faces difficult challenges of the large 8% lattice-mismatch, high dislocation densities, and antiphase domain boundaries. Although the defect-free Ge-on-Insulator (GOI), ultra-thin-body (UTB) InGaAs IIIV-on-Insulator (IIIVOI) on Si, and selective GOI were reported by us, it is still different to reach IIIVOI and GOI side-by-side for high mobility InGaAs-Ge CMOS. On the other hand, the Ge has both higher electron and hole mobility than Si for all Ge CMOS. The GOI pMOS on Si has achieved 2.6 times higher hole mobility than universal SiO 2/Si value at a medium effective field (E eff) of 0.5 MV/cm and a small equivalent-oxidethickness (EOT) of 1.4 nm. Although the GeO 2/Ge nMOS reported high peak mobility at small E eff, fast mobility degradation with increasing E eff and decreasing EOT were found.

原文英語
主出版物標題2012 International Silicon-Germanium Technology and Device Meeting, ISTDM 2012 - Proceedings
頁面64-65
頁數2
DOIs
出版狀態已發佈 - 2012
對外發佈
事件6th International Silicon-Germanium Technology and Device Meeting, ISTDM 2012 - Berkeley, CA, 美国
持續時間: 2012 六月 42012 六月 6

出版系列

名字2012 International Silicon-Germanium Technology and Device Meeting, ISTDM 2012 - Proceedings

其他

其他6th International Silicon-Germanium Technology and Device Meeting, ISTDM 2012
國家/地區美国
城市Berkeley, CA
期間2012/06/042012/06/06

ASJC Scopus subject areas

  • 電氣與電子工程

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