Gate-to-source ESD protection design for GaN-on-silicon power HEMT

A monolithic integrated bidirectional gate-to-source ESD protection circuit for power high-electron-mobility transistor (HEMT) in GaN-on-Si process is proposed. The proposed circuit is incorporated with a voltage detection mechanism to ensure that the ESD protection circuit is selectively activated only under ESD stress conditions, thereby minimizing the unwanted interference and standby leakage current during normal device operation. It has been demonstrated that the proposed design can significantly enhance the robustness against ESD events with human-body-model (HBM) ESD level exceeding ±8 kV and IEC ESD level beyond ±2.5 kV.