FPGA implementation of full-search vector quantization based on partial distance search

Wen-Jyi Hwang, Wen Kang Wei, Yao Jung Yeh

研究成果: 雜誌貢獻文章同行評審

4 引文 斯高帕斯(Scopus)

摘要

This paper presents a novel algorithm for field programmable gate array (FPGA) realization of vector quantizer (VQ) encoders using partial distance search (PDS). In most applications, the PDS is adopted as a software approach for attaining moderate codeword search acceleration. In this paper, a novel PDS algorithm well suited for hardware realization is proposed. The algorithm employs subspace search, bitplane reduction, and multiple-coefficient accumulation techniques for the effective reduction of the area complexity and computation latency. Concurrent encoding of different input vectors for further computation acceleration is also allowed by the employment of multiple-module PDS. The proposed implementation has been embedded in a softcore CPU for physical performance measurement. Experimental results show that the implementation provides a cost-effective solution to the FPGA realization of VQ encoding systems where both high throughput and high fidelity are desired.

原文英語
頁(從 - 到)516-528
頁數13
期刊Microprocessors and Microsystems
31
發行號8
DOIs
出版狀態已發佈 - 2007 十二月 3

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture
  • Software
  • Control and Systems Engineering
  • Electrical and Electronic Engineering

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