FPGA-based online learning hardware architecture for kernel fuzzy c-means algorithm

This paper presents a novel embedded system for the online training of kernel fuzzy c-means (KFCM) algorithm. A hardware architecture capable of accelerating the KFCM training process is proposed. The architecture is used as a coprocessor in the embedded system. It consists of efficient circuits for the computation of kernel functions, membership coefficients and cluster centers. In addition, the usual iterative operations for updating the membership matrix and cluster centers are merged into one single updating process to evade the large storage requirement. Experimental results show that the proposed solution is an effective alternative for image segmentation with low computational cost and low segmentation error rate.