Fast principal component analysis based on hardware architecture of generalized hebbian algorithm

Shiow Jyu Lin, Yi Tsan Hung, Wen-Jyi Hwang

研究成果: 書貢獻/報告類型會議貢獻

2 引文 斯高帕斯(Scopus)

摘要

This paper presents a novel hardware architecture for fast principle component analysis (PCA). The architecture is developed based on generalized Hebbian algorithm (GHA). In the architecture, the updating of different synaptic weight vectors are divided into a number of stages. The results of precedent stages are used for the computation of subsequent stages for expediting training speed and lowering the area cost. The proposed architecture has been embedded in a system-on-programmable-chip (SOPC) platform for physical performance measurement. Experimental results show that the proposed architecture is an effective alternative for fast PCA in attaining both high performance and low computation time.

原文英語
主出版物標題Advances in Computation and Intelligence - 5th International Symposium, ISICA 2010, Proceedings
頁面505-515
頁數11
版本M4D
DOIs
出版狀態已發佈 - 2010 十二月 3
事件5th International Symposium on Advances in Computation and Intelligence, ISICA 2010 - Wuhan, 中国
持續時間: 2010 十月 222010 十月 24

出版系列

名字Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
號碼M4D
6382 LNCS
ISSN(列印)0302-9743
ISSN(電子)1611-3349

其他

其他5th International Symposium on Advances in Computation and Intelligence, ISICA 2010
國家中国
城市Wuhan
期間10/10/2210/10/24

ASJC Scopus subject areas

  • Computer Science(all)
  • Theoretical Computer Science

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