ESD protection design for RF circuits in CMOS technology with low-c implementation

Chun Yu Lin, Ming Dou Ker

研究成果: 書貢獻/報告類型會議貢獻

摘要

To mitigate the radio-frequency (RF) performance degradation caused by electrostatic discharge (ESD) protection device, low capacitance (low-C) design on ESD protection device is a solution. With the smaller layout area and small parasitic capacitance under the same ESD robustness, silicon-controlled rectifier (SCR) device has been used as an effective on-chip ESD protection device in RF ICs. In this paper, the modified lateral SCR (MLSCR) with the waffle layout structure is studied to minimize the parasitic capacitance and the variation of the parasitic capacitance within ultra-wide band (UWB) frequencies. With the minimized parasitic capacitance, the degradation on RF circuit performance can be reduced. Besides, the fast turn-on design on MLSCR without extra parasitic capacitance from the trigger circuit adding on the I/O pad is also investigated in this work.

原文英語
主出版物標題Semiconductor Technology, ISTC 2008 - Proceedings of the 7th International Conference on Semiconductor Technology
頁面70-75
頁數6
出版狀態已發佈 - 2008 九月 29
事件7th International Conference on Semiconductor Technology, ISTC 2008 - Shanghai, 中国
持續時間: 2008 三月 152008 三月 17

出版系列

名字Proceedings - Electrochemical Society
PV 2008-1

其他

其他7th International Conference on Semiconductor Technology, ISTC 2008
國家中国
城市Shanghai
期間08/3/1508/3/17

ASJC Scopus subject areas

  • Electrochemistry

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  • 引用此

    Lin, C. Y., & Ker, M. D. (2008). ESD protection design for RF circuits in CMOS technology with low-c implementation. 於 Semiconductor Technology, ISTC 2008 - Proceedings of the 7th International Conference on Semiconductor Technology (頁 70-75). (Proceedings - Electrochemical Society; 卷 PV 2008-1).