ESD protection design for high-speed circuits in nanoscale CMOS process

Chun Yu Lin, Rong Kun Chang

研究成果: 書貢獻/報告類型會議貢獻

摘要

To protect the high-speed integrated circuits from electrostatic discharge (ESD) damages, the ESD protection design of inductor-assisted silicon-controlled rectifier (LASCR) is investigated in this work. Compared with the conventional ESD protection design of dual-diode, the LASCR has better high-speed performances and higher ESD robustness. Therefore, the LASCR is very suitable for high-speed applications.

原文英語
主出版物標題2016 International Symposium on Integrated Circuits, ISIC 2016
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781467390194
DOIs
出版狀態已發佈 - 2017 一月 23
事件2016 International Symposium on Integrated Circuits, ISIC 2016 - Singapore, 新加坡
持續時間: 2016 十二月 122016 十二月 14

出版系列

名字2016 International Symposium on Integrated Circuits, ISIC 2016

會議

會議2016 International Symposium on Integrated Circuits, ISIC 2016
國家新加坡
城市Singapore
期間16/12/1216/12/14

    指紋

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials
  • Computer Networks and Communications
  • Hardware and Architecture

引用此

Lin, C. Y., & Chang, R. K. (2017). ESD protection design for high-speed circuits in nanoscale CMOS process. 於 2016 International Symposium on Integrated Circuits, ISIC 2016 [7829726] (2016 International Symposium on Integrated Circuits, ISIC 2016). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISICIR.2016.7829726