Energy-Efficient Versatile Memories with Ferroelectric Negative Capacitance by Gate-Strain Enhancement

Yu Chien Chiu, Chun Hu Cheng, Guan Lin Liou, Chun Yen Chang

研究成果: 雜誌貢獻期刊論文同行評審

23 引文 斯高帕斯(Scopus)

摘要

In this brief, we reported a ferroelectric versatile memory with strained-gate engineering. The versatile memory with high-strain-gate showed a >40% improvement on ferroelectric hysteresis window, compared to low-strain case. The high compressive stress induced from high nitrogen-content TaN enhances monoclinic-to-orthorhombic phase transition to reach stronger ferrolectric polarization and lower depolarization field. The versatile memory featuring ferroelectric negative capacitance exhibited excellent transfer characteristics of the sub-60-mVdec subthreshold swing, ultralow off-state leakage of <1fA/μ m and > 108 on/off current ratio. Furthermore, the ferroelectric versatile memory can be switched by ±5 V under 20-ns speed for a long endurance cycling (1012 cycles). The low-power operation can be ascribed to the amplification of the surface potential to reach the strong inversion and fast domain polarization at the correspondingly low program/erase voltages.

原文英語
文章編號7949049
頁(從 - 到)3498-3501
頁數4
期刊IEEE Transactions on Electron Devices
64
發行號8
DOIs
出版狀態已發佈 - 2017 八月

ASJC Scopus subject areas

  • 電子、光磁材料
  • 電氣與電子工程

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