TY - GEN
T1 - Embedded 8-bit AES in wireless Bluetooth application
AU - Huang, Chi Wu
AU - Kuo, Shao Wei
AU - Chang, Chi Jeng
PY - 2013
Y1 - 2013
N2 - This paper presents an 8-bit AES direct FPGA hardware implementation of CFB/OFB operations without using the Block RAM (BRAM). The 8-bit AES core is then embedded through a microcontroller to interface with Bluetooth wireless for performing encryption or decryption. Two sets of the embedded systems are configured together to experiment the AES operation of the image encryption and decryption through wireless communication achieved the baud rate of 0.23 Megabits per second (Mbps). CFB/OFB operations have two advantages over ECB operation; one is the low area circuit design, and the other is the complete hiding of input patterns in plain image with identical colors. Though CFB/OFB implementation without BRAM has a little larger slice area then the implementation with RAM, yet the non-BRAM in ASIC implementation achieved only 2.2K gates, synthesized using 0.18μm technology, which is the smallest gate count for the 8-bit ASIC implementation ever proposed.
AB - This paper presents an 8-bit AES direct FPGA hardware implementation of CFB/OFB operations without using the Block RAM (BRAM). The 8-bit AES core is then embedded through a microcontroller to interface with Bluetooth wireless for performing encryption or decryption. Two sets of the embedded systems are configured together to experiment the AES operation of the image encryption and decryption through wireless communication achieved the baud rate of 0.23 Megabits per second (Mbps). CFB/OFB operations have two advantages over ECB operation; one is the low area circuit design, and the other is the complete hiding of input patterns in plain image with identical colors. Though CFB/OFB implementation without BRAM has a little larger slice area then the implementation with RAM, yet the non-BRAM in ASIC implementation achieved only 2.2K gates, synthesized using 0.18μm technology, which is the smallest gate count for the 8-bit ASIC implementation ever proposed.
UR - http://www.scopus.com/inward/record.url?scp=84887474176&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84887474176&partnerID=8YFLogxK
U2 - 10.1109/ICSSE.2013.6614638
DO - 10.1109/ICSSE.2013.6614638
M3 - Conference contribution
AN - SCOPUS:84887474176
SN - 9781479900091
T3 - ICSSE 2013 - IEEE International Conference on System Science and Engineering, Proceedings
SP - 87
EP - 92
BT - ICSSE 2013 - IEEE International Conference on System Science and Engineering, Proceedings
T2 - IEEE International Conference on System Science and Engineering, ICSSE 2013
Y2 - 4 July 2013 through 6 July 2013
ER -