Efficient pattern matching algorithm for memory architecture

Cheng Hung Lin, Shih Chieh Chang

研究成果: 雜誌貢獻文章

21 引文 斯高帕斯(Scopus)

摘要

Network intrusion detection system is used to inspect packet contents against thousands of predefined malicious or suspicious patterns. Because traditional software alone pattern matching approaches can no longer meet the high throughput of today's networking, many hardware approaches are proposed to accelerate pattern matching. Among hardware approaches, memory-based architecture has attracted a lot of attention because of its easy reconfigurability and scalability. In order to accommodate the increasing number of attack patterns and meet the throughput requirement of networks, a successful network intrusion detection system must have a memory-efficient pattern-matching algorithm and hardware design. In this paper, we propose a memory-efficient pattern-matching algorithm which can significantly reduce the memory requirement. For Snort rule sets, the new algorithm achieves 21% of memory reduction compared with the traditional AhoCorasick algorithm. In addition, we can gain 24% of memory reduction by integrating our approach to the bit-split algorithm which is the state-of-the-art memory-based approach.

原文英語
文章編號5272427
頁(從 - 到)33-41
頁數9
期刊IEEE Transactions on Very Large Scale Integration (VLSI) Systems
19
發行號1
DOIs
出版狀態已發佈 - 2011 一月 1

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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