摘要
The gate dielectric stack composed of crystalline ZrO 2 and Al 2 O 3 buffer layer treated with double nitridation was developed to reduce the capacitance equivalent thickness (CET), leakage current density (J g ), interfacial state density (D it ), and enhance thermal stability as well. A high dielectric constant of the gate stack was provided by the crystalline ZrO 2 with tetragonal/cubic phase. The J g and D it were suppressed by the insertion of the Al 2 O 3 buffer layer treated with remote NH 3 plasma nitridation because of the deactivation of the oxygen vacancies and the well passivation of the Si dangling bonds. A further nitridation using remote N 2 plasma on ZrO 2 was carried out to reduce the CET and J g by the enhancement of the dielectric constant and the deactivation of the grain boundaries and oxygen vacancies. Accordingly, a low CET of 1.09 nm, J g of 3.43 × 10 -5 A/cm 2 , and D it of 3.35 × 10 11 cm -2 eV -1 were achieved in the crystalline ZrO 2 /Al 2 O 3 buffer gate stack treated with the double nitridation. The hysteresis was also minimized significantly by the post-deposition annealing at 800 °C, which is attributed to the enhanced thermal stability. The results indicate that the crystalline high-K dielectrics/buffer layer with double nitridation treatments is a promising gate stack structure beneficial to the sub-nanometer CET scaling in the future.
原文 | 英語 |
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頁(從 - 到) | 221-227 |
頁數 | 7 |
期刊 | Applied Surface Science |
卷 | 330 |
DOIs | |
出版狀態 | 已發佈 - 2015 3月 1 |
ASJC Scopus subject areas
- 一般化學
- 凝聚態物理學
- 一般物理與天文學
- 表面和介面
- 表面、塗料和薄膜