Dielectric Layer Design of Bilayer Ferroelectric and Antiferroelectric Tunneling Junctions Toward 3D NAND-Compatible Architecture

K. Y. Hsiang, C. Y. Liao, J. H. Liu, C. Y. Lin, J. Y. Lee, Z. F. Lou, F. S. Chang, W. C. Ray, Z. X. Li, H. C. Tseng, C. C. Wang, M. H. Liao, T. H. Hou, M. H. Lee*

*此作品的通信作者

研究成果: 雜誌貢獻期刊論文同行評審

摘要

The 3D vertical ferroelectric tunneling junction (FTJ) of bilayer antiferroelectric (AFE) Hf1-xZrxO2(HZO) and Al2O3 has been demonstrated for NAND-compatible feasibility. A bilayer-type FTJ is explored for the designs of the dielectric interlayer Al2O3 0 nm to 4 nm and the ferroelectric type, while the current mechanism is revealed. The multilevel AFE-FTJ is exhibited for both the Program and Erase operations and realizes a synaptic device. High-density emerging memory and computing-in-memory (CiM) are in high demanded for the future era and can be feasible by the proposed vertical FTJ.

原文英語
頁(從 - 到)1850-1853
頁數4
期刊IEEE Electron Device Letters
43
發行號11
DOIs
出版狀態已發佈 - 2022 11月 1

ASJC Scopus subject areas

  • 電子、光磁材料
  • 電氣與電子工程

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