Design and design automation of rectification logic for engineering change

Cheng-Hung Lin*, Yung Chang Huang, Shih Chieh Chang, Wen Ben Jone

*此作品的通信作者

研究成果: 書貢獻/報告類型會議論文篇章

13 引文 斯高帕斯(Scopus)

摘要

In a later stage of a VLSI design, it is quite often to modify a design implementation to accommodate the new specification, design errors, or to meet design constraints. In addition to meet the design schedule for the new implementation, the reduction of the mask set have become very critical. In this paper, we propose a new method to add a programmable rectification module to reduce the mask cost and to improve the turn around time. When a modification is needed, one can program the rectification module to achieve the new implementation. The rectification module can be designed by one mask programmable gate array, or an embedded FPGA. To reduce the size needed for the rectification module, we also propose algorithms, which can intelligently select some internal signals of the old implementation to become pseudo primary inputs and primary outputs. Our experimental ' results are very encouraging.

原文英語
主出版物標題Proceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005
頁面1006-1009
頁數4
出版狀態已發佈 - 2005 十二月 1
事件2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005 - Shanghai, 中国
持續時間: 2005 一月 182005 一月 21

出版系列

名字Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
2

其他

其他2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005
國家/地區中国
城市Shanghai
期間2005/01/182005/01/21

ASJC Scopus subject areas

  • 電腦科學應用
  • 電腦繪圖與電腦輔助設計
  • 電氣與電子工程

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