@article{ab0688ab56e34b85905d737ded4f17a5,
title = "Design and analysis of a 77.3% locking-range divide-by-4 frequency divider",
abstract = "A cascoded frequency divider (FD) with division number of 4 and ultra-wide locking range is presented in this paper. The proposed FD consists of a divide-by-2 (D2) injection-locked frequency divider (ILFD) core and a D2 source-injection current mode logic (SICML) divider. After the cascoded integration of ILFD and SICML, the removal of transconductance and buffer stages can lower the dc power consumption and widen the locking range. The proposed FD is implemented in 0.13-μm CMOS technology and has a 77.3% frequency locking range from 13.5 to 30.5 GHz at injection power of 0 dBm while consuming 7.3-mW dc power. Compared to the previously reported ILFDs, the proposed circuit achieves the widest locking range without employing extra tuning mechanism.",
keywords = "CMOS, current mode logic (CML) latch, divide-by-4 (D4), injection-locked frequency divider (ILFD), monolithic microwave integrated circuit (MMIC), phase-locked loop (PLL), wide locking range",
author = "Kuo, {Yen Hung} and Tsai, {Jeng Han} and Chang, {Hong Yeh} and Huang, {Tian Wei}",
note = "Funding Information: Manuscript received January 09, 2011; revised May 22, 2011; accepted June 15, 2011. Date of publication August 01, 2011; date of current version October 12, 2011. This work was supported in part by the National Science Council (NSC) under Contract NSC99-2219-E-002-005, Contract NSC99-2219-E-002-011, Contract 99R80302, Contract 99R80301, Contract 10R80300, and Contract NSC 98-2221-E-003-024-MY2.",
year = "2011",
doi = "10.1109/TMTT.2011.2160963",
language = "English",
volume = "59",
pages = "2477--2485",
journal = "IEEE Transactions on Microwave Theory and Techniques",
issn = "0018-9480",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "10 PART 1",
}