摘要
Strained-Si technology could enhance the carrier mobility and improve the device performance. Contact-etch-stop-layer (CESL) structure with different stress and SiGe channel was fabricated with 90-nm technology. The electrical properties of N and PMOSFET devices combining CESL and SiGe channel were investigated. The short channel effects (SCE), such as drain-induced barrier lowering (DIBL), were also studied. Moreover, the stress contour in the SiGe channel has been simulated with TCAD to understand the relationship between stress distribution and device performance for different CESL structures. It is observed that the stress in the channel region was independent of the type of N or PMOSFET devices, but it was dependent on the CESL type and channel length. Based on the experimental and simulation results, it is confirmed that the device performance is associated with the stress in the channel, and the approach of CESL stressor and SiGe channel is shown to effectively improve the mobility of NMOSFETs and PMOSFETs.
原文 | 英語 |
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頁(從 - 到) | 8127-8132 |
頁數 | 6 |
期刊 | Journal of Nanoscience and Nanotechnology |
卷 | 13 |
發行號 | 12 |
DOIs | |
出版狀態 | 已發佈 - 2013 12月 |
ASJC Scopus subject areas
- 生物工程
- 一般化學
- 生物醫學工程
- 一般材料科學
- 凝聚態物理學