摘要
In this paper, two CMOS oversampling delta-sigma (Δ Σ) magnetic-to-digital converters (MDCs) are proposed. The first MDC consists of the magnetic operational amplifier (MOP) and a first-order switched-capacitor (SC) Δ Σ modulator. The second one directly uses the MOP to realize a first-order SC Δ Σ modulator. They can convert the external magnetic field into digital form. Both circuits were fabricated in a 0.5-μm CMOS double-poly double-metal (DPDM) process and operated at a 5-V supply voltage and the nominal sampling rate of 2.5 MHz. The dynamic ranges of these converters are at least ±100 mT. The gain errors within ±100 mT are less than 3% and the minimum detectable magnetic field can reach as small as 1 mT. The resolutions are 100 μT for both of the two MDCs. The measured sensitivities are 1.327 mv/mT and 0.45 mv/mT for the first and the second MDC, respectively.
原文 | 英語 |
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頁(從 - 到) | 1582-1586 |
頁數 | 5 |
期刊 | IEEE Journal of Solid-State Circuits |
卷 | 36 |
發行號 | 10 |
DOIs | |
出版狀態 | 已發佈 - 2001 10月 |
對外發佈 | 是 |
ASJC Scopus subject areas
- 電氣與電子工程