CMOS oversampling Δ Σ magnetic to digital converters

Lee An Ho, Shr Lung Chen, Chien Hung Kuo, Shen Iuan Liu

研究成果: 書貢獻/報告類型會議貢獻

1 引文 斯高帕斯(Scopus)

摘要

In this paper, a CMOS oversampling delta sigma (Δ Σ) magnetic to digital converter (MDC) is proposed. In the MDC, the magnetic operational amplifier (MOP) combines with the switched capacitor (SC) Δ Σ modulator, and converts the external magnetic field into digital form. Simulation and measurement results indicate that the average digital output versus the applied magnetic field is quite linear. The prototype circuit was fabricated in a 0.5 μm CMOS DPDM process. The circuit operates at a 5 V supply voltage and the sampling rate of 2.5 MHz. The maximum signal range of the converter is at least ±100 mT and the resolution can reach as small as 1 mT. The gain error within ±100 mT is less than 3%. The conversion gain is 1.327 mv/mT and the power consumption is 49.3 mW.

原文英語
主出版物標題ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
頁面388-391
頁數4
1
DOIs
出版狀態已發佈 - 2001
對外發佈Yes
事件2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001 - Sydney, NSW, 澳大利亚
持續時間: 2001 五月 62001 五月 9

其他

其他2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001
國家澳大利亚
城市Sydney, NSW
期間01/5/601/5/9

    指紋

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

引用此

Ho, L. A., Chen, S. L., Kuo, C. H., & Liu, S. I. (2001). CMOS oversampling Δ Σ magnetic to digital converters. 於 ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings (卷 1, 頁 388-391) https://doi.org/10.1109/ISCAS.2001.921874