The embedded SiGe source/drain (S/D) stressor applies the lattice mismatch between silicon and germanium atoms making silicon channel generate compressive strain in the surface channel. The compressive strain enhances hole mobility due to raising the weighting factor of the light hole contribution, causing the improvement of the pMOSFETs performance. Previous reports have investigated the effects of pMOSFETs with embedded SiGe S/D stressor. But, devices incorporated with biaxial strain and embedded SiGe S/D have not been clearly investigated. In this work, not only were the characteristics of devices containing biaxial strain and embedded SiGe S/D stressor with different channel lengths exposed, but the channel-hot-carrier (CHC) effect in short-channel pMOSFETs was also followed with interest. The experimental results show that the biaxial strain achieved higher carrier mobility in long channel. However, this strain reduces its mobility enhancement effect when the channel length becomes shorter. In addition, the embedded SiGe S/D stressor enhances the carrier mobility by increasing compressive strain in the short channel. After the CHC test for pMOSFETs with these two processes, the saturation current of the embedded SiGe S/D pMOSFETs degraded 5.5%, which was more serious than 4.2% degradation of biaxial-strain devices. It is presumable that embedded SiGe S/D strain induces more interface states or trap generation located at source/drain junction.
ASJC Scopus subject areas
- Condensed Matter Physics
- Electrical and Electronic Engineering
- Materials Chemistry