摘要
The boundary-scan test provides a structural test solution for the densely packed digital electronics. For RF devices, the structural test also provides a good diagnostic resolution to the structural defects of RF circuits, especially for the high pin-count RF-SOCs. In this paper, the boundary-scan test is implemented on a 5-GHz RF pin using LC isolation networks to connect the RF lines and the boundary-scan cell, which isolates the RF circuitry from the digital boundary scan cell. This technique overcomes the parasitic loading problems and provides a minimum RF performance degradation to a RFIC. The measurement results show only 0.4-dB gain degradation in a 5-GHz amplifier with a boundary-scan cell and LC isolation networks.
| 原文 | 英語 |
|---|---|
| 頁面 | 347-350 |
| 頁數 | 4 |
| 出版狀態 | 已發佈 - 2004 |
| 對外發佈 | 是 |
| 事件 | Proceedings - 22nd IEEE VLSI Test Symposium - Napa Valley, CA, 美国 持續時間: 2004 4月 25 → 2004 4月 29 |
其他
| 其他 | Proceedings - 22nd IEEE VLSI Test Symposium |
|---|---|
| 國家/地區 | 美国 |
| 城市 | Napa Valley, CA |
| 期間 | 2004/04/25 → 2004/04/29 |
ASJC Scopus subject areas
- 電腦科學應用
- 電氣與電子工程
指紋
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