An Implementation of Grammar-Concept Understanding Problems in Verilog Programming Learning Assistant System

Verilog is a prominent hardware description language extensively utilized in digital circuit designs. Its integration with industry-standard tools and compatibility with hardware synthesis processes make it indispensable in semiconductor design. Since dedicated courses in Verilog programming are limited in many universities worldwide due to resource limitations, an effective self-study tool is essential to meet its strong demands in this digital age. In this paper, we present an implementation of the Grammar-Concept Understanding Problem (GUP) in the Verilog Programming Learning Assistant System (VPLAS) to assist novices in code understanding studies. Previously, we developed PLAS for software programming self-studies, where GUP asks for definitions of important words in a given source code. Any answer is marked automatically in the system. For evaluations, we generated 12 GUP instances using Verilog codes for basic circuit designs. The digital circuit and the timing waveform are given to help students understand the code. We assigned them to 50 undergraduate students at the National Taipei University of Technology (NTUT), Taiwan. Their feedback demonstrated the validity of the proposal in Verilog programming self-studies.