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A World First QLC RRAM: Highly Reliable Resistive-Gate Flash with Record 108Endurance and Excellent Retention

  • M. Y. Li
  • , J. P. Lee
  • , C. H. Liu
  • , J. C. Guo
  • , Steve S. Chung*
  • *此作品的通信作者

研究成果: 書貢獻/報告類型 › 會議論文篇章

3   連結會在新分頁中打開 引文 斯高帕斯(Scopus)

摘要

In this paper, we demonstrated successfully a quad-level cell (QLC) of a resistive-gate memory. It was implemented in a 1k bits chip with integration of FinFET core on a mature logic platform. Comprehensive reliabilities have been examined. The results show the forming-free property, low programming current (< μ A), high endurance and excellent data retention. A record high 5×108 endurance can be achieved. Furthermore, a 4-bit-per-cell (16 levels) has been demonstrated successfully. The chip-level performance is also analyzed, showing well disturbance-immune during SET/RESET, READ, which kept healthy signal-to-noise margin, 2-3x. This architecture is a strong candidate for the next generation resistance memory.

原文英語
主出版物標題2023 IEEE International Reliability Physics Symposium, IRPS 2023 - Proceedings
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781665456722
DOIs
出版狀態已發佈 - 2023
事件61st IEEE International Reliability Physics Symposium, IRPS 2023 - Monterey, 美国
持續時間: 2023 3月 26 → 2023 3月 30

出版系列

名字IEEE International Reliability Physics Symposium Proceedings
卷2023-March
ISSN(列印)1541-7026

會議

會議61st IEEE International Reliability Physics Symposium, IRPS 2023
國家/地區美国
城市Monterey
期間2023/03/26 → 2023/03/30

ASJC Scopus subject areas

  • 一般工程

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