A tunable switched-capacitor (SC) bandpass delta sigma (σδ) modulator using double sampling by one input parameter is proposed. The center frequency of the modulator can be varied from fs/14 to 6fs/14 at a sampling frequency (fs) of 70MHz. Its performance can be hence improved by fine tuning the center frequency. The purposed modulator was implemented in 0.35-μm 2P4M CMOS standard technology with the core area of 4.2 mm2. The measured dynamic range of 68dB within 200kHz bandwidth can be achieved. Its power consumption is 58mW under a 3.3-V supply voltage.
|頁（從 - 到）||3676-3679|
|期刊||Proceedings - IEEE International Symposium on Circuits and Systems|
|出版狀態||已發佈 - 2005|
|事件||IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005 - Kobe, 日本|
持續時間: 2005 5月 23 → 2005 5月 26
ASJC Scopus subject areas